Guest Post by Mr. VENKATESH S S, Application Engineer, BEACON India
Introduction
In modern electronics, passing compliance tests is not an afterthought – it must be designed in from the very beginning. This blog takes you through the journey of designing a motor driver PCB, starting from schematic capture in CST Studio Suite, to performing IR drop and conducted emission (CE) testing using CST Studio Suite. By simulating EMI/EMC effects early in the design flow, engineers can avoid costly redesigns and increase the chances of first-pass success at the compliance lab.
1. Schematic-Level CE in CST Circuit & System:
Goal: Build the H-Bridge + EMI filter as a circuit in CST (no PCB yet), excite it with PWM, and measure conducted emissions at the LISN port per CISPR 25 (V-method).
- Create a Circuit project in CST Studio Suite.
- Refer to Fig. for the complete schematic: LISN → Filter → H-Bridge → Motor.
2. Excitations (PWM & supply)
The PWM gate signals were generated using Digital → Pulse (Clock pattern) with logic levels 0/1. A rise/fall of 0.001 ms and ON-time of 0.005 ms within a 0.0125 ms period gives an 80 kHz PWM at ~40% duty cycle (≈ 5 µs high, 7.5 µs low). These signals drive the H-bridge Voltage-Controlled Switches, while the motor is modelled by a simple R–L equivalent.
For reliable spectra, the transient simulation runs for 50–100 PWM cycles (≈ 0.6–1.2 ms). Frequency-domain analysis (up to 3 MHz) uses a 0.5 kHz RBW, Hamming window, and time gating from 1–3 ms to remove startup transients.
3. CE Results and Observations
- Without EMI Filter : Strong harmonics from PWM switching; several peaks exceed CISPR25 Class 1 → non-compliant.
- With EMI Filter : Significant noise reduction; emissions stay below limits across all bands → compliant.
👉 Final takeaway: Filter is essential for passing CISPR25 in motor driver circuits.
- X-axis → Frequency in kHz
- Y-axis → Conducted emission level in dBµV (or dB, depending on CST setup)
4. PCB Design & Import into CST
The designed schematic was captured in CST Circuit & System environment and later converted into a PCB layout using KiCad. The PCB was routed with proper net connections and exported in ODB++ format for CST import. This ensured that all nets, components, and layer stackup were preserved during transfer.
5. Simulation Setup in CST
Inside CST, the imported PCB was connected according to the schematic. Excitations, loads, and measurement ports were assigned to replicate the circuit-level configuration. Special attention was given to ground return paths and supply rails to accurately reflect the conducted emission behavior.
6. Simulation Results: Circuit vs PCB
- Circuit-level (Green): Quick check with H-Bridge + LISN shows strong PWM harmonics but no PCB parasitic effects.
- PCB-level (Purple): KiCad → CST ODB++ import shows cleaner spectrum; layout parasitics and grounding improve realism.
- 👉 Conclusion: Green = early estimate, Purple = accurate validation. Both confirm PCB-level testing is essential for true CISPR25 compliance
- X-axis → Frequency in kHz
- Y-axis → Conducted emission level in dBV (or dB, depending on CST setup)
Conclusion
This study demonstrates a complete conducted emissions (CE) analysis workflow for an H-Bridge motor driver using CST Studio Suite. Starting from circuit-level modelling in CST Circuit & System, the design was progressively validated through LISN integration, EMI filtering, and transient analysis.
The schematic-only simulations provided an initial view of conducted noise generated by PWM switching. However, when the design was transferred into a PCB layout and simulated with parasitic effects included, the results showed noticeable differences. This highlights the importance of performing both circuit and PCB-level validation to obtain realistic EMI behaviour.
The LISN-based CE(V-method) measurements confirmed the impact of layout and filtering on emission levels. The filter stage played a crucial role in suppressing harmonic peaks and stabilizing the spectrum across the CISPR25-defined frequency bands. The comparison between schematic and PCB results underlines that early circuit simulations are valuable for rapid iterations, but PCB-level verification is essential for compliance assurance.
Overall, the workflow proves that CST Studio Suite enables a seamless transition from schematic design to full PCB validation, ensuring that emission performance can be predicted and optimized before hardware fabrication. This simulation-driven approach reduces prototyping costs, accelerates design cycles, and provides confidence in achieving regulatory compliance for automotive and industrial motor control applications.
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Guest Post by Mr. VENKATESH S S, Application Engineer, BEACON
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